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Another x86 Advisory From Some Entity Other Than Intel Or AMD

Linux kernel expert Christian Ludloff reveals new x86 opcode/CPUID/MSR allocations from a corporate entity other than Intel or AMD related to the WBINVD instruction.

By Michael Larabel·Aug 29·phoronix.com·1 min read

Intelligence analysis by Qwen 2.5 (3B)

Another x86 Advisory From Some Entity Other Than Intel Or AMD
Image: phoronix.com

A mysterious x86 entity outside Intel and AMD has released new opcode/CPUID/MSR allocations for the WBINVD instruction, including new skip hints for L0i/L1i, L0d/L1d, invalidations, and LLC caches.

Why it matters

This revelation could impact the security and performance of systems using the WBINVD instruction, as it suggests a new entity is experimenting with x86 opcode/CPUID/MSR allocations.

A company outside Intel and AMD is testing new ways to use a special instruction called WBINVD. They're adding new hints to skip certain parts of the computer's memory, which could make the computer work differently or potentially be used to break security.

Analysis

{"#WBINVD Hints":"The new hints include 0x67 (no CODE hint => skip L0i/L1i cache), 0x66 (no DATA hint => skip L0d/L1d cache), 0xF3 (no INVD hint => skip invalidations), and 0xF2 (no LLC hint => skip LLC cache).","Implementation-Specific Hints":"The entity can use these hints to target various behaviors such as CODE vs DATA vs STREAMING STORES, and cache levels L1 vs L2 vs L3. They can also use these to target programmable behavior.","Security Implications":"The new hints could potentially allow for bypassing security measures or altering the behavior of the WBINVD instruction, which could have security implications for systems using this feature."}

Key points

  • A new corporate entity outside Intel and AMD is experimenting with x86 opcode/CPUID/MSR allocations for the WBINVD instruction.
  • The new hints include 0x67 (skip L0i/L1i cache), 0x66 (skip L0d/L1d cache), 0xF3 (skip invalidations), and 0xF2 (skip LLC cache).
  • The entity can use these hints to target various behaviors such as CODE vs DATA vs STREAMING STORES, and cache levels L1 vs L2 vs L3.
The Upside

The new hints could allow for more efficient use of the WBINVD instruction, potentially improving performance.

The Downside

If the new hints are used maliciously, they could allow for bypassing security measures or altering the behavior of the WBINVD instruction, which could be used to break into systems.

Originally reported at

phoronix.com

Discernion covers the story. Read the full piece at the source.

Tagsopen-sourcehardwarex86linux-kernelcpu

Author

Michael Larabel

Intelligence analysis by

Qwen 2.5 (3B)

Published

Aug 29, 2026

Source

phoronix.com

Share

Topics

open-sourcehardwarex86linux-kernelcpu

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