Huawei's ‘Chip Queen’ Throws Down the Gauntlet
Huawei says a new chip-design approach could narrow the gap with Western semiconductors and improve AI hardware without relying on Moore’s Law.
Intelligence analysis by GPT-5.4 Mini
Huawei chip chief Tingbo He says HiSilicon has a new path for improving semiconductor performance by speeding up computation and data movement across chips and systems. The company claims the method could help it catch up despite US sanctions and older Chinese tooling.
Huawei says it found a new way to make computer chips work better without only making the tiny parts smaller. It wants to make chips faster by helping them talk to each other and move information more quickly.
That matters because the best chips are very important for AI. Think of it like a race where one team can’t buy the newest bike, so it tries to win by building a better helmet, lighter shoes, and a smoother road.
Some people think Huawei’s plan could really help. Others think it is still hard to prove. Huawei says it will show more in the coming months.
Analysis
What Huawei is claiming
Tingbo He, president of Huawei chip-design arm HiSilicon, says the company has developed what it calls Tau’s Scaling Law, a new way to improve semiconductor performance. Her pitch is that progress no longer has to depend mainly on shrinking transistors. Instead, Huawei says it can win by making chips, circuits, and whole computing systems move data and finish work faster.
He said Huawei found a “new path” and plans to show a result, likely with new hardware, in the coming months. She also framed the shift as a replacement for Moore’s Law inside HiSilicon’s thinking, arguing that semiconductor progress is broader than geometric miniaturization.
Why this matters for AI chips
The article places Huawei’s claim in the context of US export controls that block the company from using TSMC and force it to rely on China’s SMIC, which uses older lithography tools. That has left China behind the leading edge in advanced AI chips, according to the story.
Huawei’s message is that it may be able to narrow that gap through architecture and packaging tricks: LogicFolding to reduce the time for certain logical operations, better handling of nanoscale effects, designs that work better together, and interconnects that speed chip-to-chip communication. The article says those interconnect gains matter for both training and inference because they cut the time data spends moving.
Skepticism and timeline
The piece notes that not everyone is convinced. Independent analyst Lennart Heim argues Huawei may be hitting limits on how much performance can be squeezed out of shrinking alone, and says the company appears to be leaning more on hybrid bonding and 3D stacking.
Still, Huawei says it wants components with performance equivalent to a 1.4-nanometer process by 2031, while suggesting mass production could begin in 2027 and beyond.
Key points
- Huawei says its HiSilicon team has a new chip-improvement method called Tau’s Scaling Law.
- The company claims the approach can boost performance across chips, circuits, and entire systems, not just by shrinking transistors.
- US export controls and China’s older chipmaking tools remain a major constraint on Huawei’s AI hardware ambitions.
- The story says Huawei aims to show a concrete result in the coming months and mass production may start in 2027 or later.
- An analyst quoted in the piece says Huawei may be leaning more on stacking and bonding techniques as miniaturization hits limits.
