Intel launches 288-core Clearwater Forest Xeon 6 on 18A process
Intel unveiled Clearwater Forest Xeon 6+ chips with up to 288 E-cores, aimed at dense agentic and telco workloads.
Intelligence analysis by GPT-5.4 Mini
Intel's Clearwater Forest Xeon 6+ pushes core density hard, pairing up to 288 E-cores with 18A manufacturing and a package built for existing sockets. The pitch is simple: more parallel CPU capacity for agent-style workloads, plus enough memory and accelerators to keep those cores busy.
Intel made a new server chip with a huge number of little workers inside it. The biggest version has 288 cores, which is like having 288 tiny helpers doing many small jobs at the same time.
It is meant for computer tasks that ask lots of quick questions, like checking the web, moving files, or looking things up in a database. Think of it like a restaurant with many fast cashiers instead of one super-fast one: it helps when many customers need simple service at once.
Intel says the chip can fit into existing server setups more easily, and it also has extra helpers for things like encryption and file compression. It gives up some fancy features to keep the number of cores high, because those features are not always needed for this kind of work.
Analysis
What Intel launched
Intel introduced Clearwater Forest, branded Xeon 6+, and said the top end reaches 288 cores. The company is aiming the chip at telco networks, SaaS platforms, and other high-throughput server jobs, but the article argues it also fits agentic AI systems that generate many CPU-bound requests.
How the chip is built
The design uses twelve 24-core compute tiles made on Intel's 18A process. Those sit alongside three Intel 3 tiles that handle memory controllers and L3 cache, while PCIe, CXL, and several accelerators live in two I/O dies borrowed from Xeon 6900P parts. Intel says the shared I/O and socket should make adoption easier because the chip can fit existing board designs.
What Intel gives up
The new Darkmont E-cores trade away some features found in Xeon 6 P-cores. They do not offer AVX-512, AMX, or hyperthreading, and they also run at lower clock speeds. Intel's argument is that many agentic tasks do not need those extras, because jobs like running curl, Python, or SQL queries are mostly about lots of simple parallel work.
Why it still looks strong
Intel says the new cores deliver 17% higher instructions per clock than its earlier E-core Xeons, along with faster boost clocks. The company also packs 16 accelerators into the I/O dies for cryptography, data movement, compression, decompression, and load balancing. SKUs range from 144 to 288 cores, with TDPs from 330W to 450W, 12 DDR5 channels, and support for up to 8000 MT/s memory.
Where it fits
Intel is positioning Clearwater for density-heavy deployments where latency is less important, such as chatbot features that can tolerate a slightly slower response. For lower-latency work, Intel points customers to P-core Xeons like Granite Rapids and the future Diamond Rapids. The article also notes Intel's claim that one Clearwater Forest system could replace up to nine second-gen Xeon Scalable boxes, though memory costs may complicate that pitch.
Key points
- Intel announced Clearwater Forest Xeon 6+, its first 2nm-class Xeon, with up to 288 cores.
- The chip uses twelve 24-core 18A compute tiles plus Intel 3 tiles for memory and cache.
- Intel dropped AVX-512, AMX, and hyperthreading in favor of denser, lower-power E-cores.
- The processor includes 16 accelerators for cryptography, compression, decompression, and load balancing.
- Intel is targeting dense agentic workloads, telcos, and service providers, with existing socket compatibility.
