NVIDIA Harnesses Vera CPU to Speed Up Design of Next-Generation CPUs and GPUs
NVIDIA is deploying its Vera CPU across EDA workflows with Cadence and Synopsys, showing up to 1.5x performance gains in formal verification and functional simulation tasks used to design next-generation NVIDIA processors.
Intelligence analysis by Llama
NVIDIA is using its own Vera CPU to accelerate the EDA tools from Cadence and Synopsys that will design the next generation of NVIDIA chips, with early benchmarks showing 1.5x speedups on selected verification workloads.
NVIDIA is using its new super-fast computer brain chip called Vera to help design its next, even better chips. It's a bit like a chef using their sharpest knife to make an even sharper knife for tomorrow's kitchen.
Analysis
A Closed Loop Between Silicon and Software
NVIDIA is doing something rare in the semiconductor world: designing its next generation of chips using its own CPU silicon. The Vera CPU, with 88 custom Olympus cores, an LPDDR5X memory subsystem, and a second-generation NVIDIA Scalable Coherent Fabric, is being deployed across the EDA workflows used to validate and tape out future NVIDIA processors. This creates what the company describes as a continuous feedback loop, where each generation of NVIDIA CPUs helps design the next. It is a virtuous cycle in which the chip design team also becomes the chip design tool's most demanding internal customer.
The CPU Bottleneck That GPUs Couldn't Fix
While GPUs and AI have transformed many EDA algorithms, several critical workloads remain bound by single-core CPU performance, memory bandwidth, and latency. Logic simulation, formal verification, and parts of digital implementation still need fast individual cores more than massive parallelism. That is why Vera's architecture, which the company says emphasizes per-core performance alongside high memory bandwidth, is well-suited to these tasks. Early tests on Cadence Jasper (formal verification) and Synopsys VCS (functional simulation) showed up to 1.5x higher performance on selected production-class workloads, using the same number of cores as the comparison systems, according to NVIDIA.
Beyond the 1.5x Number
The benchmark result is a starting point rather than a ceiling. NVIDIA says it is working closely with Cadence and Synopsys on application profiling, software optimization, and system-level tuning to broaden those gains across more workflows over time. The company is also looking ahead to the next-generation Rosa CPU, powered by the new NVIDIA Rigel core, signaling a CPU roadmap explicitly tied to its own design needs. More details are slated to be shared at DAC 2026, the industry's flagship design automation conference, where NVIDIA will likely pitch Vera and its successors as a credible platform for the most demanding EDA workloads.
Key points
- NVIDIA is deploying its Vera CPU across EDA workflows used to design its next-generation processors
- Early tests on Cadence Jasper and Synopsys VCS showed up to 1.5x higher performance on selected workloads using the same number of cores
- Vera combines 88 custom Olympus cores with LPDDR5X memory and second-generation Scalable Coherent Fabric
- NVIDIA plans to follow Vera with the Rosa CPU, powered by the new Rigel core, extending the same design-feedback strategy
- More details are expected at DAC 2026, the industry's flagship electronic design automation conference
If the early 1.5x gains generalize across more EDA workloads, NVIDIA could meaningfully compress chip design cycles, enabling faster iteration and shorter time-to-market for future GPUs and CPUs. The collaboration with Cadence and Synopsys may also push the broader EDA ecosystem toward higher performance standards, benefiting the wider semiconductor industry.
The 1.5x figure covers selected workloads rather than the full verification pipeline, and broader optimization depends on third-party EDA vendors fully adapting their tools to Vera, which is not guaranteed. If those partnerships do not deepen, the gains could remain incremental rather than transformative, leaving NVIDIA's CPU-for-EDA thesis unconvincing to outside customers.
